Freescale Semiconductor /MKL25Z4 /UART2 /C3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as C3

7 43 0 0 00 0 0 0 0 0 0 0 0 (0)PEIE 0 (0)FEIE 0 (0)NEIE 0 (0)ORIE 0 (0)TXINV 0 (0)TXDIR 0 (T8)T8 0 (R8)R8

ORIE=0, FEIE=0, TXINV=0, PEIE=0, TXDIR=0, NEIE=0

Description

UART Control Register 3

Fields

PEIE

Parity Error Interrupt Enable

0 (0): PF interrupts disabled; use polling).

1 (1): Hardware interrupt requested when PF is set.

FEIE

Framing Error Interrupt Enable

0 (0): FE interrupts disabled; use polling).

1 (1): Hardware interrupt requested when FE is set.

NEIE

Noise Error Interrupt Enable

0 (0): NF interrupts disabled; use polling).

1 (1): Hardware interrupt requested when NF is set.

ORIE

Overrun Interrupt Enable

0 (0): OR interrupts disabled; use polling.

1 (1): Hardware interrupt requested when OR is set.

TXINV

Transmit Data Inversion

0 (0): Transmit data not inverted.

1 (1): Transmit data inverted.

TXDIR

TxD Pin Direction in Single-Wire Mode

0 (0): TxD pin is an input in single-wire mode.

1 (1): TxD pin is an output in single-wire mode.

T8

Ninth Data Bit for Transmitter

R8

Ninth Data Bit for Receiver

Links

() ()